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The phase 1 submission deadline is January 22, 2019.
 

How can you contribute to this $2 billion Department of Defense initiative?

Air Force Research Labs (AFRL), in partnership with AFWERX Vegas, is launching the Advanced Microelectronics Prototype and Design Challenge. The challenge seeks successfully designed and silicon-validated Application Specific Integrated Circuit (ASIC) and System on a Chip (SoC) solutions using advanced process technology nodes.

The Advanced Microelectronics Prototype and Design Challenge is one of the most demanding of all the AFWERX challenges. Yet it is also one of the greatest opportunities we’ve seen. That’s because The USAF is providing access to a platform that includes a commercial cloud-based development environment, design and verification tools, IP libraries, design expertise support, and fabrication. Access to the EDA tools and IP libraries is valued at $10M per license, but the USAF is offering it FREE to selected participants.

With that level of support, imagine what you could contribute.

Please log in and learn more about the Advanced Microelectronics Prototype and Design Challenge.

There is no charge to register, there is no charge to participate

What’s in it for you:

By participating in this challenge, you have the opportunity to:

  • Receive resources and support to develop cutting-edge SoC while maintaining the design IP that is yours to retain

  • Access a state of the art SoC development platform that includes design tools and critical IP functions, a value of up to $10M

  • Partner with the United States Air Force (USAF) to fabricate your SoC

  • Leverage AFWERX to augment your areas of expertise through peer and government partnerships

  • Attend the Challenge Showcase event/s in Las Vegas, if your solution is selected, to meet peers, USAF customers, other government agencies, and the investment community

  • Receive official recognition for you, your team, and your company

  • Help the USAF and improve the security of the United States

  • Gain access to a top Department of Defense initiative with an initial approved budget of $2 billion

 

Challenge Statement

What is your solution for a 14nm advanced Application Specific Integrated Circuit (ASIC) or System on a Chip (SoC) that can operate and improve the features of an autonomous product of your choosing while maintaining the integrity (provenance, traceability) and security needs (information protection, mathematical algorithms) of critical systems?

 

Timeline

PHASE 1: Submit Proposals
SUBMIT: 11/5/18 — 1/22/19
SHOWCASE: 2/19/19 — 2/20/19
PHASE 2: Design & Simulation
SUBMIT: 3/1/19 — 6/28/19
SHOWCASE: 7/30/19 — 7/31/19
PHASE 3: Physical Design
SUBMIT: 8/6/19 — 10/4/19
SHOWCASE: 10/15/19 — 10/16/19
PHASE 4: Physical Prototype
SUBMIT: 10/22/19 — 4/18/20
SHOWCASE: 5/5/20 — 5/6/20
PHASE 5: Prototype Testing
SUBMIT: TBD
SHOWCASE: TBD
PHASE 6: Full Production
SUBMIT: TBD
SHOWCASE: TBD
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